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FEATURESDESCRIPTION
产品
PINASSIGNMENTS
AI
AO
BO
CO
做
AIAI
BI
BI
C1
C1
D1
D1D1
E2
E1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AI
AI
AO
E1
BO
BI
BI
地
VCC
DI
DI
做
E2
CO
CI
CI
soic pACKAGE
(t运算 视图)
EnableTruthTable
TB5R3
SLLS643–SEPTEMBER2005
QUADDIFFERENTIALPECLRECEIVERS
•
FunctionalReplacementfortheAgereBRF1A
Thesequaddifferentialreceiversacceptdigitaldata
overbalancedtransmissionlines.theytranslate
•
PinEquivalenttoGeneralTrade26LS32
differentialinputlogiclevelstoTTLoutputlogic
•
HighInputImpedanceApproximately8k
Ω
水平.
•
<2.6-nsmaximumpropagationdelay
thetb5r3isapin-andfunction-compatiblereplace-
•
tb5r3provides50-mvhysteresis(典型)
mentfortheageresystemsbrf1a;itincludes3-kv
•
-1.1-vto7.1-vcommon-modeinputvoltage
hbmand2-kvcdmesdprotection.
范围
thepower-downloadingcharacteristicsofthere-
•
single5-v
±
10%Supply
ceiverinputcircuitareapproximately8k
Ω
relativeto
•
esdprotectionhbm>3kvandcdm>2kv
thepowersupplies;hencetheydonotloadthe
transmissionlinewhenthecircuitispowereddown.
•
operatingtemperaturerange:-40
°
Cto85
°
C
•
availableingull-wingsoic(jedecms-013,
Thepackagingforthisdifferentiallinereceiverisa
16-pingullwingsoic(dw)ora16pinsoic(d).
dw)andsoic(d)包装
Theenableinputsofthisdeviceincludeinternal
拉-upresistorsofapproximately40k
Ω
thatare
•
digitaldataorclocktransmissionoverbal-
connectedtoV
CC
toensurealogicalhighlevelinput
ancedLines
iftheinputsareopencircuited.
FUNCTIONALBLOCKDIAGRAM
输出
E1E2
情况
00Active
10Active
01Disabled
11Active
pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsoftexas
instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
productiondatainformationiscurrentasofpublicationdate.
copyright©2005,texasinstrumentsincorporated
ProductsconformtospecificationsperthetermsoftheTexas
instrumentsstandardwarranty.productionprocessingdoesnot
necessarilyincludetestingofallparameters.
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