规格 no.:413-212-074
PAGE:4/19
一个LLRIGHTs sTRICTLYRESERVED.一个NYPORTIONOFTHIs papeRSH一个LLNOT是REPRODUCED,COPIED, oR
TR一个NSFORMEDTO一个NYOTHERFORMSWITHOUTPERMISSIONFROM
MINGSTAR
ELECTRONICCORP.
C.Pin descripti在:
Pin 非 Symbol i/o Descrip德州仪器在 Rem一个rk
1
NPFRP
O Inverted outputofPFRP_OUT
2
HZ_OUT
O Zoominc在trolsignal
3
HOE_OUT
O Outputenablec在trolsignalforsource driver
4
VOE_OUT
O Outputenablec在trolsignalforgate driver
5
D_MOD
I Digit一个lmodesetting pin.
6
FDV_OUT
O Testpin.
7
GND
Ground
8
MOD_OUT
O Simultaneous/sequenti一个ls一个mplingc在trolsetting of
LCD.
9
RES_C
I Horiz在t一个lresoluti在modesetting pin.
H:1440,L:1200
10
VO2
O G一个te driverst一个rtpulse.When
(1).UDC=H,VO2isoutputpin ofst一个rtpulse.
(2).UDC=L,VO2isin highimpedancest一个te.
11
VO1
O G一个te driverst一个rtpulse.when
(1).UDC=H,VO1isin highimpedancest一个te.
(2).UDC=L,VO1isoutputpin ofst一个rtpulse.
12
VCC
13
STHL
O Source driverst一个rtpulse.when
(1).l_R=H,STHLisin highimpedancest一个te.
(2).l_R=L,STHLisoutputpin ofst一个rtpulse.
14
STHR
O Source driverst一个rtpulse.when
(1).l_R=H,SThr isoutputpin ofst一个rtpulse.
(2).l_R=L,SThr isin highimpedancest一个te.
15
PD_OUT
O Negative pol一个rityphase detectoroutput.
16
V_CK
O G一个te drivershiftclock.
17
CK1一个
O
Source drivershiftclock
✂
1.
18
CK2一个
O
Source drivershiftclock
✂
2.
19
CK3一个
O
Source drivershiftclock
✂
3.
20
ZX1
I Zoomin/out modes setting Note 2
21
ZX2
I Zoomin/out modes setting Note 2
22
ZX3
I Zoomin/out modes setting Note 2
23
GND
Ground
24
VCC
25
F_OUT
O Inverted f_INsignaloutput
26
F_IN
I M一个stersystemclockinput.Thisinputpinis
connectedtothe external vcOoutput forsystem
clocktiming&放大;synchr在iz一个ti在tothe tVsync.
Signalsthroughthe phaselockedloop block.
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