W83L950D
- viii -
17.2
比较器 数据 register (cmpd).............................................................................. 65
18.
看门狗 计时器 ................................................................................................................. 65
17.1.
标准 运作 的看门狗 计时器 ...................................................................... 65
17.2.
最初的 值 的看门狗 德州仪器mer................................................................................... 65
17.3.
看门狗 计时器 h 计数 源选择 位运作.......................................... 65
17.4.
空闲 模式 dis能 位 ................................................................................................ 66
17.5.
看门狗 计时器 控制寄存器 (wdtcon)............................................................... 66
19.
flash 记忆...................................................................................................................... 67
19.1
在 碎片 程序flash memory .................................................................................... 67
19.1.1
sfrah, sfral(0f9h, 0f8h) .......................................................................................67
18.1.1
sfrfd (0fah)..............................................................................................................67
18.1.2
sfrcn (0fbh) .............................................................................................................67
19.2
外部 programming 模式 ........................................................................................ 67
20.
ps/2 设备 在TERFACE....................................................................................................... 70
20.1
ps/2 transmit 和 receive 数据寄存器 (ps2data)............................................. 70
20.1.1
transmit register .........................................................................................................70
20.1.2
receive register ..........................................................................................................70
20.2
ps/2 控制 registers (ps2con)............................................................................... 71
20.3
ps/2 状态 registers (ps2sts).................................................................................. 72
20.4
ps/2 状态_2 registers (ps2sts_2).......................................................................... 73
21.
smbus 地址 和寄存器..................................................................................... 74
21.1
smbus host 状态寄存器(hsr) ............................................................................. 74
21.2
smbus host 控制寄存器(hcr)............................................................................ 75
21.3
smbus host 读 字节 count 寄存器(h_rbc) ....................................................... 76
21.4
smbus host/从动装置 数据 fifo 寄存器 (dfifo) ......................................................... 76
21.5
smbus host-从动装置 address 寄存器 (sadr).............................................................. 76
21.6
smbus host/从动装置 模式 和 先进先出水平的 长度 register (hmr).............................. 77
21.7
smbus host/从动装置 先进先出 control 寄存器(fcr)......................................................... 77
21.8
smbus host/从动装置 中断控制 register (icr)..................................................... 78
21.9
smbus host/从动装置 中断状态 register (isr)....................................................... 79
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