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资料编号:1117044
 
资料名称:PCM1609A
 
文件大小: 488K
   
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介绍:
24 位 192kHz 8 通道 Δ-Σ 音频 DAC
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
www.德州仪器.com
CONTROLINTERFACETIMINGREQUIREMENTS
t
(mch)
1.4 v
ML
t
(mls)
LSB
1.4 v
t
(mcl)
t
(mhh)
t
(mlh)
t
(mcy)
t
(mdh)
t
(mds)
MC
MDI
LSB
MDI
t0013-05
LSB
50% 的 v
DD
MDO
t
(mos)
1.4 v
PCM1609A
SLES145–AUGUST2005
Figure26showsthetimingoftheauto-incrementreadoperation.theoperationbeginsbywritingcontrolregister
11,settingincto1,andsettingreg[6:0]tothefirstregistertobereadinthesequence.theactualread
operationstartsonthenexthigh-至-lowtransitionofthemlpin.
thereadcyclestartsbysettingther/wbitofthecontrolwordto1,andsettingalloftheidx[6:0]bitsto0.所有
subsequentbitsinputonmdiareignoredwhilemlissetto0.forthefirsteightclocksofthereadcycle,mdois
settothehigh-impedancestate.thisisfollowedbyasequenceof8-bitwords,eachcorrespondingtothedata
containedincontrolregistersnthroughy,wherenisdefinedbythereg[6:0]bitsincontrolregister11,和
whereyisthelastregistertoberead.thereadcycleiscompletedwhenmlissetto1,immediatelyafterthe
mcclockcyclefortheleast-significantbitofthelastregisterhascompleted.ifmlisheldlowandthemcclock
continuesbeyondthelastphysicalregister(register19),thereadoperationreturnstocontrolregister1and
subsequentcontrolregisters,continuinguntilmlissetto1.
Figure27showsadetailedtimingdiagramfortheserialcontrolinterface.payspecialattentiontothesetupand
holdtimes,aswellast
(mls)
andt
(mlh)
,whichdefineminimumdelaysbetweentheedgesofthemlandmc
clocks.thesetimingparametersarecriticalforpropercontrol-portoperation.
SYMBOLPARAMETERMINMAXUNITS
t
(mcy)
MCpulsecycletime100ns
t
(mcl)
mclow-leveltime50ns
t
(mch)
mchigh-leveltime50ns
t
(mhh)
mlhigh-leveltime300ns
t
(mls)
MLfallingedgetoMCrisingedge20ns
t
(mlh)
MLholdtime
(1)
20ns
t
(mdh)
MDIholdtime15ns
t
(mds)
MDLsetuptime20ns
t
(mos)
MCfallingedgetoMDOstable30ns
(1)mcrisingedgeforlsbtomlrisingedge.
figure27.controlinterfacetiming
19
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