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2.3signaldescriptions
TMS320VC5402A
fixed-pointdigitalsignalprocessor
SPRS015E–SEPTEMBER2001–REVISEDJANUARY2005
table2-2listseachsignal,函数,andoperatingmode(s)groupedbyfunction.seesection2.2forexact
pinlocationsbasedonpackagetype.
table2-2.signaldescriptions
终端
i/o
(1)
描述
名字
DATASIGNALS
a22(msb)i/o/z
(1)(2)
paralleladdressbusa22[mostsignificantbit(msb)]througha0[leastsignificantbit(lsb)].thesixteen
a21lsblines,a0toa15,aremultiplexedtoaddressexternalmemory(程序,数据)ori/o.theseven
a20msblines,a16toa22,addressexternalprogramspacememory.a22-a0isplacedinthe
a19high-impedancestateintheholdmode.a22-a0alsogoesintothehigh-impedancestatewhenoffis
a18low.
A17
a15-a0areinputsinhpi16mode.thesepinscanbeusedtoaddressinternalmemoryviathehost-端口
A16
接口(hpi)whenthehpi16pinishigh.thesepinsalsohaveschmitttriggerinputs.
A15
A14
Theaddressbushasabusholderfeaturethateliminatespassivecomponentsandthepowerdissipation
A13
associatedwiththem.thebusholderkeepstheaddressbusatthepreviouslogiclevelwhenthebus
A12
goesintoahigh-impedancestate.
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
a0(lsb)
d15(msb)i/o/z
(1)(2)
paralleldatabusd15(msb)throughd0(lsb).d15-d0ismultiplexedtotransferdatabetweenthecore
d14cpuandexternaldata/programmemoryori/odevicesorhpiinhpi16mode(whenhpi16pinishigh).
d13d15-d0isplacedinthehigh-impedancestatewhennotoutputtingdataorwhenrsorholdisasserted.
d12d15-d0alsogoesintothehigh-impedancestatewhenoffislow.thesepinsalsohaveschmitttrigger
d11inputs.
D10
Thedatabushasabusholderfeaturethateliminatespassivecomponentsandthepowerdissipation
D9
associatedwiththem.thebusholderkeepsthedatabusatthepreviouslogiclevelwhenthebusgoes
D8
intothehigh-impedancestate.thebusholdersonthedatabuscanbeenabled/disabledundersoftware
D7
控制.
D6
D5
D4
D3
D2
D1
d0(lsb)
initialization,interruptandresetoperations
interruptacknowledgesignal.iackindicatesreceiptofaninterruptandthattheprogramcounteris
iacko/zfetchingtheinterruptvectorlocationdesignatedbya15-a0.iackalsogoesintothehigh-impedancestate
whenoffislow.
INT0
(1)
externaluserinterruptinputs.int0-int3aremaskableandareprioritizedbytheinterruptmaskregister
INT1
(1)
i(imr)andtheinterruptmodebit.int0-int3canbepolledandresetbywayoftheinterruptflagregister
INT2
(1)
(ifr).
INT3
(1)
nonmaskableinterrupt.nmiisanexternalinterruptthatcannotbemaskedbywayoftheintmorthe
NMI
(1)
I
imr.whennmiisactivated,theprocessortrapstotheappropriatevectorlocation.
重置.rscausesthedigitalsignalprocessor(dsp)toterminateexecutionandforcestheprogram
RS
(1)
icounterto0ff80h.whenrsisbroughttoahighlevel,executionbeginsatlocation0ff80hofprogram
记忆.rsaffectsvariousregistersandstatusbits.
(1)i=输入,o=输出,z=高-阻抗,s=供应
(2)thispinhasaninternalbusholdercontrolledbywayofthebscrregister.
介绍
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