www.德州仪器.com
FEATUREDESCRIPTION
自动/manualreferenceclockswitching
t0062-01
pri_ref
秒_ref
状态_ref
pri_秒_clk
1
2
1
2
3
4
内部的
涉及 时钟
primary 时钟
secondary 时钟
primary 时钟
CDCM7005
SCAS793A–JUNE2005–REVISEDJUNE2005
yxmux2yxmux1yxmux0selecteddividedv(c)xosignalforthedefault
YxOutputs
110Divby16
(1)
111Divby8
(1)thisdividersettingdependsontheselectedp-dividermodeforthe“div-用-16”divider.inthedefaultmode(afterpowerup),div-用-16
isselected.butifbit30orbit31ofword1issetto[1],thenthediv-用-4and90degreephaseshiftordiv-用-8and90degreephase
shiftisselected.
thecdcm7005supportstworeferenceclockinputs,theprimaryclockinput,pri_ref,andthesecondaryclock
输入,秒_ref.theclockscanbeselectedmanuallyorautomatically.therespectivemodeisselectedbythe
dedicatedspiregisterbit(word0,bit30).
inthemanualmode,theexternalref_selsignalselectsoneofthetwoinputclocks:
ref_sel[1]->primaryclockisselected
ref_sel[0]->secondaryclockisselected
intheautomaticmode,theprimaryclockisselectedbydefaultevenifbothclocksareavailable.incasethe
primaryclockisnotavailableorfails,thentheinputswitchestothesecondaryclockaslonguntiltheprimary
clockisback.Figure15showstheautomaticclockselection.
便条:pri_refisthepreferredclockinput.
figure15.behaviorofstatus_refandpri_秒_clk
intheautomaticmode,thefrequenciesofbothclocksignalshavetobesimilar,butmaydifferbyupto20%.这
phaseoftheclocksignalcanbeany.
Theclockinputcircuitryisdesigntosuppressglitchesduringswitchingbetweentheprimaryandsecondaryclock
inthemanualandautomaticmode.thisavoidsanundefinedswitchingofthefollowingcircuitries.
thephaseoftheoutputclockslowlyfollowsthenewinputphase.therewillbenophase-jumpattheoutput.
howquickthephaseadjustmentisdonedependsontheselectedloopparameter,i.e.,ataloopbandwidthof
<100hz;thephaseadjustmentcantakeseveralms.thereisnophasebuild-outfunctionsupported(likein
sonet/sdhapplications).
25
: 点此下载
