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frequencyhold-overmode
CDCM7005
SCAS793A–JUNE2005–REVISEDJUNE2005
table2.lvcmosphaseshiftoptions
phasep-divider180
°
阶段-shiftp16-div-函数
0
°
anyp-dividernodiv-用-16
90
°
p16-divnodiv-用-4ordiv-用-8
180
°
anyp-divideryesdiv-用-16
270
°
p16-divyesdiv-用-4ordiv-用-8
ifthep16-divisselectedbythefb_muxanddiv-用-4ordiv-用-8isactive,the90degreephaseshiftedclock
willbesynchronizedtopri_reforsec_ref.thismeansalloutputsyxx,whichareswitchedtodiv-用-4or
div-用-8,areinphasetopri_reforsec_ref.allotheroutputsare90degreephaseshiftedwithleading
阶段.
theholdfunctionisausefulfeaturewhichhelpsthedesignertoimprovethesystemreliability.thehold
functionholdstheoutputfrequencyincasetheinputreferenceclockfailsorisdisrupted.duringhold,这
chargepumpisswitchedoff(3-状态)freezingthelastvalidoutputfrequency.theholdfunctionwillbereleased
afteravalidreferenceclockisback.forproperholdfunction,theanalogplllockdetectmodehastobe
起作用的.
thefollowingregistersettingsareinvolvedwiththeholdfunction:
•
lockdetectwindow(word3,bit2,3,6)
:definesthewindowinnsinsidethelockisvalid.thesizeis
3.5ns,8.5ns,18.5ns,oracompletecycle-slip.lockissetifreferenceclockandthefeedbackclockare
insidethispredefinedlock-detectwindowforapre-selectednumberofsuccessivecyclesorifacycle-slipno
longeroccurs.
•
输出-的-锁:
definestheout-的-lockcondition:ifthereferenceclockandthefeedbackclockatthepfdare
outsidethepredefinedlockdetectwindoworifacycle-slipoccurs.
•
循环-slip(word3,bit6)
:循环-slipoccurswhenthephaseshiftatthepfdisgreaterthanoneperiodof
thefrequency.itisacomplete(integernumber)cyclejump,i.e.causedbyanout-的-lockofthepll.
循环-slipisequivalenttothepllpull-intime.
•
numberofclockcycles(word3,bit4,5)
:definesthenumberofsuccessivepfdcycleswhichhaveto
occurinsidethelockwindowtosetlockdetect.thisappliesnotforout-的-lockcondition.
•
支撑-函数(word3,bit9)
:selectsholdfunction(seemoredetailsbelow).
•
支撑-触发(word3,bit11)
:defineswhethertheholdfunctionisalwaysactivated(bit11=[1])或者
whetheritisdependentonthestateoftheanalogplllockdetectoutput(bit11=[0]).inthelattercase,
holdisactivated,iflockisset(高)andde-activatediflockisreset(低).
•
analogplllockdetect(word1,bit29)
:analoglockoutputchargesordischargesanexternalcapacitor
witheveryvalidlockcycle.thetimeconstantforlockdetectcanbesetbythevalueofthecapacitor.
thecdcm7005supportstwotypesofholdfunctions,oneexternalcontrollableholdmodeandoneinternal
模式,支撑.
Withthe
externalHOLDfunction
thechargepumpcandirectlybeswitchedinto3-状态(pinh8[bga]orpin14
[qfn]canbeprogrammedforhold[word2,bit29]).thisfunctionisalsoavailableviaspiregister(word2,
bit31).
iflogiclowisappliedtotheholdpin,thechargepumpwillbeswitchedto3-状态.aftertheholdpinis
released,thechargepumpisswitchedbackintonormaloperationwiththenextvalidreferenceclockcycleat
pri_reforsec_refandthenextvalidfeedbackclockcycleatthepfd.duringhold,thepdividerandall
outputsyxareatnormaloperation.
支撑-在-函数
:thepllhastobeinlocktostarttheholdfunction.itswitchesthechargepumpinto
3-statewhenanout-的-lockeventoccurs.itleavesthe3-statechargepumpstatewhenthereferenceclockis
后面的.thenitstartsalockingsequenceof64cyclesbeforeitgoesbacktothebeginningofthehold-overloop.
thededicatedlookingsequenceandadigitalphasealignmentenableafastlock.
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