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资料编号:253430
 
资料名称:DAC6573IPW
 
文件大小: 623.34K
   
说明
 
介绍:
QUAD, 10-Bit, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL TO ANALOG CONVERTER
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
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f/s-modeprotocol
h/s-modeprotocol
开始
情况
SDA
停止
情况
SDA
SCL
S P
SCL
DAC6573
SLAS402–NOVEMBER2003
theoryofoperation(持续)
thedac6573worksasaslaveandsupportsthefollowingdatatransfermodes,asdefinedinthei
2
c-总线
规格:standardmode(100kbps),fastmode(400kbps),andhigh-speedmode(3.4mbps).thedata
transferprotocolforstandardandfastmodesisexactlythesame,thereforetheyarereferredtoasf/s-modein
thisdocument.theprotocolforhigh-speedmodeisdifferentfromthef/s-模式,anditisreferredtoas
h/s-模式.thedac6573supports7-bitaddressing;10-bitaddressingandgeneralcalladdressare
supported.
主控
initiatesdatatransferbygeneratinga
startcondition
.这
startcondition
iswhenahigh-至-低
transitionoccursonthesdalinewhilesclishigh,asshowninfigure29.alli
2
c-compatibledevices
recognizea
startcondition
.
themasterthengeneratesthesclpulses,andtransmitsthe7-bitaddressandthe
读/writedirectionbit
r/wonthesdaline.duringalltransmissions,themasterensuresthatdatais
有效的
.一个
validdata
情况
requiresthesdalinetobestableduringtheentirehighperiodoftheclockpulse(seefigure30).alldevices
recognizetheaddresssentbythemasterandcompareittotheirinternalfixedaddresses.onlytheslave
devicewithamatchingaddressgeneratesan
acknowledge
(seefigure31)bypullingthesdalinelow
duringtheentirehighperiodoftheninthsclcycle.upondetectingthisacknowledge,themasterknowsthat
communicationlinkwithaslavehasbeenestablished.
ThemastergeneratesfurtherSCLcyclestoeither
transmit
datatotheslave(r/wbit1)或者
receive
datafrom
theslave(r/wbit0).ineithercase,这
接受者
mustacknowledgethedatasentbythe
传输者
.soan
acknowledgesignalcaneitherbegeneratedbythemasterorbytheslave,dependingonwhichoneisthe
接受者.9-bitvaliddatasequencesconsistingof8-bitdataand1-bitacknowledgecancontinueaslongas
需要.
tosignaltheendofthedatatransfer,themastergeneratesa
stopcondition
bypullingtheSDAlinefromlow
tohighwhilethescllineishigh(seefigure29).thisreleasesthebusandstopsthecommunicationlink
withtheaddressedslave.alli
2
c-compatibledevicesmustrecognizethestopcondition.uponthereceiptofa
stopcondition
,alldevicesknowthatthebusisreleased,andtheywaitfora
startcondition
followedbya
matchingaddress.
whenthebusisidle,bothsdaandscllinesarepulledhighbythepullupdevices.
themastergeneratesastartconditionfollowedbyavalidserialbytecontainingh/smastercode
00001xxx.thistransmissionismadeinf/smodeatnomorethan400kbps.nodeviceisallowedto
acknowledgetheh/smastercode,butalldevicesmustrecognizeitandswitchtheirinternalsettingto
support3.4mbpsoperation.
Themasterthengeneratesa
repeatedstartcondition
(arepeatedstartconditionhasthesametimingasthe
startcondition).afterthisrepeatedstartcondition,theprotocolisthesameasf/s-模式,exceptthat
transmissionspeedsupto3.4mbpsareallowed.astopconditionendstheh/s-modeandswitchesallthe
internalsettingsoftheslavedevicestosupportthef/s-模式.insteadofusingastopcondition,重复的
startconditionsmustbeusedtosecurethebusinh/s-模式.
figure29.startandstopconditions
12
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