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资料编号:253430
 
资料名称:DAC6573IPW
 
文件大小: 623.34K
   
说明
 
介绍:
QUAD, 10-Bit, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL TO ANALOG CONVERTER
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
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DAC6573I
2
CUpdateSequence
AddressByte
BroadcastAddressByte
DAC6573
SLAS402–NOVEMBER2003
thedac6573requiresastartcondition,avalidi
2
caddress,acontrolbyte,anmsbbyte,andanlsbbytefora
singleupdate.afterthereceiptofeachbyte,dac6573acknowledgesbypullingthesdalinelowduringthehigh
periodofasingleclockpulse.avalidi
2
caddressselectsthedac6573.thecontrolbytesetstheoperational
modeoftheselecteddac6573.oncetheoperationalmodeisselectedbythecontrolbyte,dac6573expectsan
msbbytefollowedbyanlsbbytefordataupdatetooccur.dac6573performsanupdateonthefallingedgeof
theacknowledgesignalthatfollowsthelsbbyte.
thecontrolbyteneedsnottoberesentuntilachangeinoperationalmodeisrequired.thebitsofthecontrol
bytecontinuouslydeterminethetypeofupdateperformed.因此,forthefirstupdate,dac6573requiresastart
情况,avalidi
2
caddress,acontrolbyte,anmsbbyteandanlsbbyte.forallconsecutiveupdates,
dac6573needsanmsbbyte,andanlsbbyteaslongasthecontrolcommandremainsthesame.
UsingtheI
2
chigh-speedmode(f
scl
=3.4mhz),theclockrunningat3.4mhz,each10-bitdacupdateotherthan
thefirstupdatecanbedonewithin18clockcycles(msbbyte,acknowledgesignal,lsbbyte,acknowledge
信号),at188.88ksps.usingthefastmode(f
scl
=400khz),clockrunningat400khz,maximumdacupdate
rateislimitedto22.22ksps.onceastopconditionisreceived,dac6573releasesthei
2
Cbusandawaitsa
newstartcondition.
MSBLSB
10011a1a0r/w
theaddressbyteisthefirstbytereceivedfollowingthestartconditionfromthemasterdevice.thefirstfive
位(msbs)oftheaddressarefactorypresetto10011.thenexttwobitsoftheaddressarethedeviceselect
bitsa1anda0.thea1,a0addressinputscanbeconnectedtov
DD
ordigitalgnd,orcanbeactivelydrivenby
ttl/cmoslogiclevels.thedeviceaddressissetbythestateofthesepinsduringthepower-upsequenceof
thedac6573.upto16devices(dac6573)canstillbeconnectedtothesamei
2
c-总线.
MSBLSB
10010000
broadcastaddressingisalsosupportedbydac6573.broadcastaddressingcanbeusedforsynchronously
updatingorpoweringdownmultipledac6573devices.dac6573isdesignedtoworkwithothermembersofthe
dac857x,dac757x,anddac557xfamiliestosupportmultichannelsynchronousupdate.usingthebroadcast
地址,dac6573respondsregardlessofthestatesoftheaddresspins.broadcastissupportedonlyinwrite
模式(masterwritestodac6573).
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