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2.5.2signalgroupsdescription
TRST
gp0[7]/ext_int7
(b)
ieee 标准
1149.1
(jtag)
Emulation
保留
重置 和
中断
控制/状态
TDI
TDO
TMS
TCK
EMU0
EMU1
NMI
gp0[6]/ext_int6
(b)
gp0[5]/ext_int5
(b)
gp0[4]/ext_int4
(b)
重置
RSV07
RSV06
时钟/pll
CLKIN
CLKMODE1
CLKMODE0
PLLV
EMU2
EMU3
EMU4
EMU5
GP0
一般-目的 输入/输出 0 (gp0) 端口
gp0[7]/ext_int7
(b)
gp0[6]/ext_int6
(b)
gp0[5]/ext_int5
(b)
gp0[4]/ext_int4
(b)
gp0[3]/pcieeai
clkout6/gp0[2]
(一个)
clkout4/gp0[1]
(一个)
GP0[0]
clkout6/gp0[2]
(一个)
clkout4/gp0[1]
(一个)
EMU6
EMU7
EMU8
EMU9
EMU10
gp0[15]/prst
(c)
gp0[14]/pclk
(c)
gp0[13]/pinta
(c)
gp0[12]/pgnt
(c)
gp0[11]/preq
(c)
gp0[10]/pcbe3
(c)
gp0[9]/pidsel
(c)
vdac/gp0[8]/pci66
(c)
RSV08
EMU11
RSV04
RSV03
RSV05
附带的
控制/状态
pci_en
tout0/mac_en
RSV01
RSV00
RSV02
TMS320DM642
video/imagingfixed-pointdigitalsignalprocessor
SPRS200J–JULY2002–REVISEDAUGUST2005
一个.thesepinsaremuxedwiththegp0pinsandbydefaultthesesignalsfunctionasclocks(clkout4orclkout6).
tousethesemuxedpinsasgpiosignals,theappropriategpioregisterbits(gpxenandgpxdir)mustbeproperly
enabledandconfigured.formoredetails,seethedeviceconfigurationssectionofthisdatasheet.
b.thesepinsaregp0pinsthatcanalsofunctionasexternalinterruptsources(ext_int[7:4]).defaultafterresetis
ext_intxorgpioasinput-仅有的.
c.thesegp0pinsaremuxedwiththepciperipheralpinsandbydefaultthesesignalsaresetuptonofunctionwith
boththeGPIOandPCIpinfunctions
无能
.formoredetailsonthesemuxedpins,seethedeviceconfigurations
sectionofthisdatasheet.
figure2-7.cpuandperipheralsignals
DeviceOverview
21
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