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DIGITALINTERFACE
TimingAndControl
ReadingData
ADS8406
SLAS426A–AUGUST2004–REVISEDDECEMBER2004
principlesofoperation(持续)
Seethetimingdiagramsinthespecificationssectionfordetailedinformationontimingsignalsandtheir
(所需的)东西.
TheADS8406usesaninternaloscillatorgeneratedclockwhichcontrolstheconversionrateandinturnthe
throughputoftheconverter.noexternalclockinputisrequired.
conversionsareinitiatedbybringingtheconvstpinlowforaminimumof20ns(afterthe20nsminimum
requirementhasbeenmet,theconvstpincanbebroughthigh),whilecsislow.theads8406switchesfrom
thesampletotheholdmodeonthefallingedgeoftheconvstcommand.acleanandlowjitterfallingedgeof
thissignalisimportanttotheperformanceoftheconverter.thebusyoutputisbroughthighafterconvst
goeslow.busystayshighthroughouttheconversionprocessandreturnslowwhentheconversionhasended.
SamplingstartsassoonastheconversionisoverwhenCSistiedloworstartswiththefallingedgeofCSwhen
busyislow.
bothrdandcscanbehighduringandbeforeaconversionwithoneexception(csmustbelowwhen
convstgoeslowtoinitiateaconversion).boththerdandcspinsarebroughtlowinordertoenablethe
paralleloutputbuswiththeconversion.
theads8406outputsfullparalleldataintwo'scomplementformatasshownintable1.theparalleloutputis
activewhencsandrdarebothlow.thereisaminimalquietzonerequirementaroundthefallingedgeof
convst.thisis50nspriortothefallingedgeofconvstand40nsafterthefallingedge.nodatareadshould
beattemptedwithinthiszone.anyothercombinationofcsandrdsetstheparalleloutputto3-状态.byteis
usedformultiwordreadoperations.byteisusedwheneverlowerbitsoftheconverterresultareoutputonthe
higherbyteofthebus.refertotable1foridealoutputcodes.
table1.idealinputvoltagesandoutputcodes
DESCRIPTIONANALOGVALUEDIGITALOUTPUT
fullscalerange2(+v
ref
)
2'scomplement
leastsignificantbit(lsb)2(+v
ref
)/65536
BINARYCODEHEXCODE
+fullscale(+v
ref
)–1lsb01111111111111117fff
Midscale0V00000000000000000000
Midscale–1LSB0V–1LSB1111111111111111FFFF
–fullscale(–v
ref
)10000000000000008000
theoutputdataisafull16-bitword(d15–d0)ondb15–db0pins(msb–lsb)ifbyteislow.
theresultmayalsobereadonan8-bitbusforconvenience.thisisdonebyusingonlypinsdb15–db8.inthis
casetworeadsarenecessary:thefirstasbefore,leavingbytelowandreadingthe8mostsignificantbitson
pinsdb15–db8,thenbringingbytehigh.whenbyteishigh,thelowbits(d7–d0)appearonpinsdb15–d8.
thesemultiwordreadoperationscanbedonewithmultipleactiverd(toggling)orwithrdtiedlowforsimplicity.
ConversionDataReadout
DATAREADOUT
字节
DB15–DB8PinsDB7–DB0Pins
highd7–d0allone's
LowD15–D8D7–D0
20
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