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直接-memoryaccess(dma)
interruptpriority(iemtocim)
TMS470R1A288
16/32-bitriscflashmicrocontroller
SPNS106–SEPTEMBER2005
thedirect-memoryaccess(dma)controllertransfersdatatoandfromanyspecifiedlocationinthea288
memorymap(exceptforrestrictedmemorylocationssuchasthesystemcontrolregistersarea).thedma
managesupto16channels,andsupportsdatatransferforbothon-chipandoff-chipmemoriesandperipherals.
thedmacontrollerisconnectedtoboththecpuandperipheralbuses,enablingthesedatatransferstooccurin
parallelwithcpuactivityandthusmaximizingoverallsystemperformance.
althoughthedmacontrollerhastwopossibleconfigurationsforthea288device,thedmacontroller
configurationis32controlpacketsand16channels.
forthea288dmarequesthardwiredconfiguration,看Table5.
table5.dmarequestlinesconnections
(1)
MODULESDMAREQUESTINTERRUPTSOURCESDMACHANNEL
EBMExpansionBusDMArequestEBDMAREQ0DMAREQ[0]
spi1spi1end-receivespi1dma0dmareq[1]
spi1spi1end-transmitspi1dma1dmareq[2]
mibadc/i2c1adcev/i2c1readmibadcdma0/i2c1dma0dmareq[3]
mibadc/sci1adcg1/sci1end-receivemibadcdma1/sci1dma0dmareq[4]
mibadc/sci1adcg2/sci1end-transmitmibadcdma2/sci1dma1dmareq[5]
I2C1I2C1writeI2C1DMA1DMAREQ[6]
spi2spi2end-receivespi2dma0dmareq[7]
spi2spi2end-transmitspi2dma1dmareq[8]
i2c2/c2sibi2c2readend-receive/c2sibend-receivei2c2dma0/c2sidma0dmareq[9]
i2c2/c2sibi2c2writeend-transmit/c2sibend-transmiti2c2dma1/c2sidma1dmareq[10]
I2C3I2C3readI2C3DMA0DMAREQ[11]
I2C3I2C3writeI2C3DMA1DMAREQ[12]
ReservedDMAREQ[13]
sci2sci2end-receivesci2dma0dmareq[14]
sci2sci2end-transmitsci2dma1dmareq[15]
(1)fordmachannelswithmorethanoneassignedrequestsource,onlyoneofthesourceslistedcanbethedmarequestgeneratorina
givenapplication.thedevicehassoftwarecontroltoensurethattherearenoconflictsbetweenrequestingmodules.
eachchannelhastwocontrolpacketsattachedtoit,allowingthedmatocontinuouslyloadramandgenerate
periodicinterruptssothatthedatacanbereadbythecpu.thecontrolpacketsallowfortheinterruptenable,
andthechannelsdeterminethepriorityleveloftheinterrupt.
dmatransfersoccurinoneoftwomodes:
•
非-requestmode(usedwhentransferringfrommemorytomemory)
•
requestmode(usedwhentransferringfrommemorytoperipheral)
formoredetailedfunctionalinformationonthedmacontroller,seethe
TMS470R1xDirectMemoryAccess
(dma)controllerreferenceguide
(literaturenumberspnu194).
interruptrequestsoriginatingfromthea288peripheralmodules(i.e.,spi1orspi2;sci1orsci2;rti;等.)是
assignedtochannelswithinthe48-channelinterruptexpansionmodule(iem)在哪里,viaprogrammableregister
mapping,thesechannelsarethenmappedtothe32-channelcentralinterruptmanager(cim)portionofthesys
单元.
ProgrammingmultipleinterruptsourcesintheIEMtothesameCIMchanneleffectivelysharestheCIMchannel
betweensources.
thecimrequestchannelsaremaskablesothatindividualchannelscanbeselectivelydisabled.allinterrupt
requestscanbeprogrammedinthecimtobeofeithertype:
•
fastinterruptrequest(fiq)
•
normalinterruptrequest(irq)
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